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OMG-OCUP-100 exam Format | OMG-OCUP-100 Course Contents | OMG-OCUP-100 Course Outline | OMG-OCUP-100 exam Syllabus | OMG-OCUP-100 exam Objectives

Examination Number: OMG-OCUP-100
Duration: 120 minutes for residents of English-speaking countries; 150 minutes for all others
Minimum Passing Score: 60 items correct out of 90
Prerequisite: None

The Class Diagram 25%
The Object Diagram 5%
The Package Diagram 5%
The Use Case Diagram 5%
The Activity Diagram 20%
The Sequence Diagram 15%
The State Machine Diagram 10%
TOTAL 100%

Common Structure
• Type
• Dependency
• Namespace
• VisibilityKind (public, private, protected)
• MultiplicityElement
• Constraint
• Comment
• PackageImport

• Package (NOTE that Package Merge is not covered in OCUP 2)

Simple Classifiers
• PrimitiveType
• DataType
• Enumeration
• EnumerationLiteral
• Interface
• InterfaceRealization
• Signal
• Reception

Structured Classifiers
• Association
• Class

• Generalization
• Feature
• Structural Feature
• Behavioral Feature
• Property
• Operation
• Parameter
• AggregationKind
(Composition, Aggregation)
• InstanceSpecification
• Slot

• LiteralBoolean
• LiteralInteger
• LiteralReal
• LiteralUnlimitedNatural
• LiteralNull
• LiteralString
• Opaque Expression

Use Cases
• UseCase
• Actor
• Include
• Extend

• Interaction
• OccurrenceSpecification
• ExecutionSpecification
• ExecutionOccurrenceSpecification
• DestructionOccurrenceSpecification
• Lifeline
• Message
• MessageOccurrenceSpecification
• MessageSort
• MessageEnd

Common Behavior
• CallEvent
• SignalEvent
• Trigger
• OpaqueBehavior

• Activity
• ActivityFinalNode
• ActivityParameterNode
• ControlFlow
• InitialNode
• DecisionNode
• FlowFinalNode
• ForkNode
• JoinNode
• MergeNode
• ObjectFlow
• ObjectNode

• Action
• CallBehaviorAction
• CallOperationAction,
• SendSignalAction
• AcceptEventAction
• Pin
• InputPin, OutputPin
• OpaqueAction

State Machines
• StateMachine
• State
• Transition
• Pseudostate: choice, junction, initial
• FinalState

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OMG UML study help

Accelerating excessive-degree SysML and SystemC SoC Designs | OMG-OCUP-100 exam Questions and Practice Questions

with the aid of Waseem Raslan, Mentor pictures EgyptAhmed Sameh, The American institution in Cairo


SysML, the committed system level UML-based mostly notation proposed by way of the OMG, is gaining a lot of momentum as a equipment degree design standard. Design productiveness is without doubt one of the leading challenges dealing with the semiconductor design roadmap for >= 32 nm expertise as pointed out by way of the ITRS. increasing the stage of abstraction and automation are two of the methodologies recommended through the ITRS to address the design productiveness problem. Producing executable requirements is an additional methodology to raise the productiveness. This research suggests that the automatic mapping of SysML, the gadget level UML based mostly notations adopted via the OMG to SystemC, that turned into standardized by way of the IEEE, can carry the stage of design abstraction in an automatic atmosphere and produce executable info.


In its 2005 design report, ITRS [20] has listed a couple of challenges which are dealing with the EDA design within the close future. among these challenges was the need to raise the design productivity. elevating the stage of design abstraction is one key design methodology that has been suggested through the ITRS to conquer the design productivity challenge.

digital Design Automation, EDA, equipment are very effective at the register switch stage of abstraction and the abstraction tiers beneath. Being distinctive and slow with the aid of nature, these stages of abstraction aren't proper for validating an entire gadget that can be extra carried out in application or hardware. In these days’s tight schedules and hard time to market competition, the means to validate the complete device at a more robust level of abstraction is becoming a compulsory for designers to steer clear of unpleasant surprises at vital phases of the system integration. rising equipment level languages, like SystemC and SystemVerilog, have erupted to raise the degree of abstraction level above the RTL one. Yet those languages nevertheless have upper obstacles in terms of visible descriptions and ease of use at the device level. furthermore, Martin shows in [5] that these new languages cannot, by means of themselves, be used to shut the gap between hardware and utility designers.

UML has been the utility notations standard for years and has been generally adopted and used for the application neighborhood. several researches have counseled that UML, principally after its 2.0 typical, may be used as a hardware requirement and description notation as well. considering that SystemC is considered the language that may well be most appropriate used for describing the device at a really excessive degree of abstraction, and considering the fact that it's a C++ based library, SystemC is regarded the herbal language to observe the UML in the abstraction degree hierarchy. in addition, SystemC fashions produces an executable that will also be run to simulate the equipment it fashions. If SystemC is modeling a equipment at a very high level of abstraction, this executable will also be regarded the executable specification of the equipment, which is among the methodologies which are cautioned with the aid of the ITRS to handle the design productivity problem. considering the fact that elevating the automation degree is among the methodologies cautioned by way of the ITRS to conquer the productivity challenge, computerized translation from UML to SystemC has been a hot of subject of research in the remaining 4 years. a few gadget level UML profiles have proposed in the context of those researches.

Realizing the magnitude to standardize these gadget stage notation profiles, a request for notion, RFP, had been offered to the OMG community to standardize a equipment level UML profile that may also be top-quality used to model a device. SysML has been proposed for the OMG neighborhood and its 1.0 draft revision has a fine potential to turn into the normal equipment stage UML profile. The purpose of this analysis is to investigate the mapping between SysML and SystemC, propose and indicate the SystemC modeling innovations that may still influence in modeling each the constitution and behavioral SysML diagram to produce a single executable that represents the gadget conduct. A prototype for a translation device, a SysML mannequin compiler, has been carried out the use of a UML modifying device that supports SysML. Un-timed TLM SystemC fashions had been generated to mannequin the expected behavior of the SysML.This paper is prepared because it follows: area 2 gifts related work to this analysis, part 3 gifts the prototype that has been carried out, section four gifts the mapping between SysML and

SystemC through a realistic SysML instance, and finally conclusions and future work are offered in part 5.

1. connected WORK

Thiagarajan et al. have proposed a system in [18] that parses the UML design produced from Rhapsody device in its XMI structure to provide an abstract tree of the design it is fed to the speed template based code generation engine. The proposed system is fed additionally with a set of SystemC templates to generate the SystemC code in response to them. Their work became in particular focused on the classification and state chart diagrams.

In a later analysis, Thiagarajan et al. have proposed a device in [16] which they've called RT2SystemC translator. in this analysis, they have used Rational Rose real Time UML editing tool to model the total system. To generate the SystemC code, the C++ generated code from Rational Rose turned into transformed into XML using the GCC_XML utility. The XML output is then preprocessed and parsed using JDOM, then translated into SystemC code.

Prevostini et al. have proposed in [9] the ACES design flow it's a complete design flow that begins from the UML stage. ACES design move grabs the gadget specifications through the class, state desktop, recreation, sequence and use case diagrams edited with the aid of the Rhapsody tool. Then extracts the characteristic and structure tips through traversing Rhapsody data mannequin, accessed through Rhapsody APIs, to generate the SystemC fashions. ACES design stream takes the SystemC generated code down the way in the course of the software, hardware and interface synthesis process.

In an try to create a formal bridge between UML and SystemC, Snook et al. have proposed in [13] translating UML design into the formal B language where formal B validation equipment can also be utilized to the design. This step became performed by way of creating a tool called U2B. After validating the design within the B domain, it’s translated to SystemC the use of a created tool referred to as B2SystemC. Snook et al. have created a really good UML profile called UML-B and focused their work on the package, category and state chart diagrams.

Mellor et al. have proposed in [6] an executable and translatable equipment that permits the designers to model debug, and validate their UML mannequin through mannequin execution in spite of the actual implementation. After model validation, the model gets translated into algorithmic C or C++ with the aid of making use of a collection of translation guidelines on it. Mellor et al. are convinced, [7],that most effective the classification, state chart and the motion diagrams are reasonable enough for modeling hardware. in addition they're convinced that circular trip engineering is not essential in this particular design area, i.e. generated code shouldn’t be manually edited with the aid of the designers. The generated algorithmic C or C++ code is then fed to the synthesis tools that are able to put in force the hardware a part of the device.

different researches have been carried out targeting SystemC code generation focused on chiefly the type and state desktop diagrams as in [19], [10], [11], [12] and others. all the outdated translators had been focused on a subset of the UML diagrams, particularly class diagrams and state computer diagrams, using a proposed UML profile to healthy gadget stage modeling. The existing research is focused on SysML profile proposed by OMG to be the gadget level standard. The current research is not specializing in specific diagrams. On the opposite this research is attempting to benefit from lots of the SysML diagrams right through the SystemC transformation section.

all of the in the past linked researches have created their own UML profile to be suitable for system stage modeling. Some researchers have gone the extra-mile and created a SystemC certain UML profile. Realizing the magnitude of standardization, THALES and others have submitted, in March 2003, a RFP “Request For idea” to the OMG “Object management community” to standardize a UML specific profile for system modeling. A working neighborhood has been fashioned and created a programs Modeling Language forum called SysML [15]. The forum has proposed a SysML notation, according to UML 2.0 edition, to address the issues raised within the SE RFP. Like UML, SysML is on its solution to develop into an OMG general certainly that lots of UML enhancing vendor tools have actively participated within the discussion board and are competing to aid the SysML in their equipment even earlier than it’s absolutely standardized. SysML is designed to be advantageous in specifying necessities, system constitution, functional habits, and allocations during specification and design phases of gadget engineering. SysML uses some UML 2.0 diagrams as is, extends every other UML 2.0 diagrams, and introduces new diagrams to obtain its goals. figure 1 suggests the SysML diagram structure.

determine 1 SysML 1.0 Diagram architecture

UML 2.0 diagrams that are reused devoid of alterations: Use Case diagram, Sequence diagram, and State machine dia­gram. UML 2.0 diagrams which are reused and extended: pastime diagram (extends UML 2.0 endeavor diagram), Block Definition dia­gram (extends UML 2.0 type diagram), interior Block diagram (extends UML 2.0 Composite constitution diagram), and Pack­age diagram (extends UML 2.0 equipment diagram).

New diagrams that have been introduced are: Parametric Constraint diagram, Allocation diagram/Allocation hint capability desk, and Require­ments diagram.

SystemC, as described through OSCI, is a library of classes and a simulation kernel that lengthen average C++ to permit the modeling of systems by using providing hardware constructs within the context of average C++. Being constructed on ordinary C++ closes the hole between SW and HW designers in addition to providing a good platform for development of system-degree equipment. many of the EDA vendors are competing to guide SC simulation, synthesis in their design flows. Many semiconductor and methods agencies begun to use SystemC of their design flows. SystemC Language Reference guide (LRM) has been standardized as IEEE 1666 with the aid of the IEEE. SystemC has won the fame of being sophisticated at architectural design and architectural verification & HW/SW co-verification as counseled through Arnout et al. of their SystemC-SystemVerilog comparison in [1]. This superiority at structure stage, apart from being C++ primarily based language, suggested SystemC to be the subsequent stage design language to the UML degree.figure 2 SystemC Language architecture

The distinctive layers of which the SystemC language is composed are shown in figure 2. SystemC offers the following to the dressmaker:

  • A kernel for event-pushed simulation it's the base infrastructure upon which the routine and strategies can be handled.
  • The skill to add any information classification the use of the C++ means of inheritance.
  • a set of primitive channels that can be used to explain primitive communication between distinctive modules.
  • a collection of very advantageous libraries to do verification and operate transaction stage modeling.
  • a couple of equipment stage design constructing blocks. besides helping a number of predefined hardware information types.
  • SystemC design constructing blocks, as defined via its LRM [14] and illustrated in [4], are specifically: modules, ports, interfaces, channels and tactics.

    Modules are the main building blocks of the SystemC design. truly any module is a C++ class derived from SC_MODULE SystemC class. Any module should contain a set of ports to talk with other modules, a set of tactics that describe the functionality of each and every module. inner records and channel for maintaining the mannequin state and communique amongst interior approaches. additionally modules can comprise different modules to mannequin the design hierarchy. Interfaces are used to outline the set of operations, parameters forms and return values without specifying how these operations are definitely carried out. These interfaces are used to allow for easy exploration of different implementations, having the equal interface, with no need to do many adjustments to the original fashions.

    The potential for a module to have interaction with other modules via neatly-described boundaries is usually mentioned by using the idea of port. Channels are the implementation of the SystemC interfaces, they define how the channels behave and the way they're implemented. they can have many different implementations of the of the same interface, accordingly giving approaches for the designers to discover different communication protocols, having the equal interface, by just altering the interface implementation with out affecting the module performance. described as member features in the modules, processes are the primary unit of performance in SystemC. SC_MODULE methods have to be registered, via SC_METHOD or SC_THREAD name, within the scheduler to be considered SystemC blocks.

    3. PROPOSED SysML TO SystemC CODE generation

    A dedicated survey has been performed on both business and open source UML/SysML editing equipment to opt for the appropriate tool for this analysis. ARTiSAN Studio, Rhapsody and Telelogic TAU G2 have been regarded for use during this analysis. based on the survey results, and due to the fact that Rhapsody has been utilized in a few amazing equivalent researches [18] and [9], Rhapsody 6.1 device of I-Logix [3] matched their choice criteria.

    Many design alternate options had been investigated to be able to implement the computerized SystemC code technology from SysML designs:

    1. traditional UML model strategy

    This approach depends upon producing XMI mannequin of the Rhapsody design it truly is based on UML 1.2 notations. the place the UML 2.0 and SysML constructs are represented with the aid of stereotypes. The XMI mannequin can then be at once examine by way of some of the template primarily based code technology environments, [2], where acceptable templates should be applied to it to generate person customized SystemC code. The Eclipse fostered task, OpenArchitectureWare [8], has been recognized as a candidate ambiance to operate the code era step, however unluckily it OAW wasn’t able to communicate conveniently with Rhapsody 6.1 tool.

    2. Eclipse UML2 model method

    The Eclipse fostered UML2 undertaking, [17], has created a lightweight finished UML 2.0 statistics model this is

    anticipated to be adopted because the typical records model between lots of the UML supplier equipment. OpenArchitectureWare can study and generate Eclipse UML2 statistics model and generate code out of it by means of templates as well. however regrettably, Rhapsody 6.1 device doesn’t generate Eclipse UML2 equal models of its designs. So the 2d strategy is to traverse the Rhapsody data mannequin through its API’s and generate the equal Eclipse UML2 records mannequin that could be then fed to OpenArchitectureWare to practice the templates for code technology. This method would have doubled the trouble against producing the SystemC code.

    three. Rhapsody API and a traveler based mostly approach

    This approach depends on getting access to Rhapsody 6.1 statistics model advice via its COM API interface. Rhapsody gives quite a lot of tips on how to entry its APIs: through visible primary, VB scripts, VC++, and Java. having access to the APIs via VC++ has been selected.

    Having accessed Rhapsody SysML design advice through its API’s, a traveler primarily based mechanism, [2], has been chosen to traverse the SysML design records model, via Rhapsody COM API interface, and generate the applicable SystemC model for every part.

    youngsters the third approach is heavily dependant on Rhapsody data mannequin and API’s, it has been selected to behavior this analysis and produce the SystemC fashions. Yet the device has been designed to separate Rhapsody records model traversal from the code generation to enable for immediate Eclipse-UML2 information mannequin era in education of adopting the 2d method to be much less based on a particular seller equipment. A prototype has been created to reveal the visibility of the third method. The prototype is at the moment capable of generate SystemC code for the structure SysML requisites, whereas work is on going to generate the SystemC code for the behavioral SysML requisites. aspiring to benefit from the SysML diverse diagrams in visualizing, designing, documenting and validating the equipment mannequin no restrictions had been placed on the kinds of the diagrams that could be translated into SystemC. The implemented prototype additionally creates a makefile in addition to a Microsoft visible Studio 7.1 venture for the generated SystemC code to be in a position to collect and hyperlink the generated SystemC code with the SystemC libraries to produce an executable without the need of the fashion designer guide intervention. In other words the output of the gadget is a SystemC executable that will also be run to validate the total device, now not just a group of SystemC generated data. The computerized technology of this makefile and the Microsoft challenge information adopts a template based mostly code generation, [2], methodology. Semantically correct transformation between SysML design and SystemC generated fashions could be validated by means of trying out the SystemC executable and guaranteeing that it behaves as expected for pattern SysML code.

    figure three SysML/SystemC Translation device

    4. Mapping SysML to SystemC

    A prototype that has been carried out the usage of considered one of Rhapsody provided SysML design examples, the cellular HandSet example. This SysML instance has three main blocks: the ConnectionManagementBlock, the MobilityManagementBlock and the DataLinkBlock, besides two actors the cell unit, MMI, and the network. figure 4 indicates the excessive degree architecture of the of the cell Handset SysML design with its excessive stage blocks and actors. The prototype is in a position to generate an executable that models both the constitution and behavioral diagrams of the SysML design. The generated SystemC executable become run the sequence of routine method calls had been in comparison to the expected sequence of hobbies and strategies calls listed within the offered sequence diagrams to locate them matching. The prototype was run on a different SysML design supplied by means of Rhapsody, the Radar device design, and produced also a a success SystemC specification of the design.

    figure four high degree structure of cellular HandSet SysML instance offered by Rhapsody device

    The connectivity is completed in SystemC by the use of creating inner SystemC channels like right here code snippet shows the generated SystemC code the represents this module.

    ConnectionManagementBlock::ConnectionManagementBlock(sc_module_name nm) : sc_module(nm) // Channel/Submodule allocations and connectivity_CallControl = new CallControl("_CallControlInst");_CallControl->setitsConnection(_Connection);_CallControl->setitsCallList(_CallList);_CallControl-> setitsSupplementaryServices(_SupplementaryServices);_CallControl->setitsSMS(_SMS);_CallControl->cc_mm(community);_CallControl->cc_in(call_req);_CallList = new CallList("_CallListInst");_CallList->setitsCallControl(_CallControl);_Connection = new Connection("_ConnectionInst");_Connection->setitsCallControl(_CallControl);_SMS = new SMS("_SMSInst");_SMS->setitsCallControl(_CallControl);_SupplementaryServices = new SupplementaryServices("_SupplementaryServicesInst");_SupplementaryServices-> setitsCallControl(_CallControl);…

    determine 5 Connection management Block Diagram

    The connectivity of ports is finished through SystemC ports via code like:


    whereas every sub-module has setter easy methods to characterize the associations between CallControl module and the relaxation of the modules.

    The dynamic conduct of the SysML can also be represented in a considerable number of diagrams: StateMachine, recreation, Sequence, and Use Case diagrams as illustrated in determine 6. right here determine represents the state machine diagram that specifies the dynamic habits of the CallControl SysML block. the following code snippet represents the main formulation that is generated to mannequin the habits described in the SysML state laptop diagram shown above. The transition and state action code in the above figure is written within the SysML action language as precise with the aid of Rhapsody. This action language is translated to its equivalent SystemC code. for instance the SysML action observation OUT_PORT(cc_mm)->GEN(Disconnect); is translated to cc_mm.write(“Disconnect”); whereas every SystemC module has a dedicated code to intercept the incoming messages like “Disconnect” and fire an inside experience that SystemC block habits code will act upon.

    void CallControl::processStatechartOfCallControloutputs() swap(_currentStatechartOfCallControlstate) ConnectionManagement::_eventDisconnect.default_event());ruin;case Idle:// suggests no name in progressif (ConnectionManagement::_eventPlaceCallReq.experience() == true) _nextStatechartOfCallControlstate.write(active);//Actionscc_mm.write("PlaceCallReq");next_trigger(SC_ZERO_TIME);next_trigger();wreck;// State Idle Actionnext_trigger( ConnectionManagement::_eventPlaceCallReq.default_event());ruin;;

    In modeling the SysML endeavor diagram, each activity is modeled as a SystemC system while the action language that triggers each endeavor is translated into the proper SystemC activities that handle technique activation. If all the conduct description of the design is modeled in either the state machine or the recreation diagrams, the assistance that stay within the sequence diagrams is considered redundant and symbolize a further the sequence of routine and operations that the design should still go through when a specific event is prompted. This redundant suggestions can also be used to be sure the universal design is undamaged and goes throughout the specified sequence of operations as particular within the set of sequence diagrams. right here determine indicates the sequence of hobbies and messages which are generated when placing a name is requested.

    The generated SystemC code is effectively storing the pursuits and operations called during the SystemC design execution in a correct records constitution. After the execution, the sequence diagrams events and messages are traversed and compared with the sequence of activities and operations produced with the aid of running the design. If each sequences map to each and every different, this could imply that SysML/SystemC design is suitable.


    in this research, they now have highlighted that using UML notation to mannequin and design a equipment at a extremely high stage has won loads of recognition on the fresh years. a few UML profiles have been created to support in bridging the gap between the UML notation and gadget stage design. OMG is fostering SysML as a dedicated system level UML 2.0 profile. SystemC represents the natural next level of system abstraction after UML/SysML. SystemC has already develop into an IEEE typical in late 2005. in this analysis, a SysML/SystemC mannequin transformation prototype has been created with very promising outcomes. loads of work has been carried out before to utilize UML and SystemC to create system level design environment. so far as they be aware of this analysis is the first committed SysML/SystemC mannequin transformation. A examine of the SysML/SystemC mapping and a model transformation prototype has been created with very promising effects.


    [1]Guido Arnout and Dennis Brophy, “SystemC and SystemVerilogDesigning SoC together”. Presentation given on the Open SystemC technology Symposium. San Diego, CA. DAC 2004.

    [2] Krzysztof Czarnecki and Simon Helsen. “Classification of model Transformation approaches”,OOPSLA’03 Workshop on Generative suggestions in the Context of model-driven structure.


    [4] Thorsten Grother, grant Martin, Stan Liao, Stuart Swan, “device Design with SystemC”. Kluwer tutorial Publishers 2002.

    [5] Martin, furnish, “SystemC and the future of Design Languages: opportunities for clients and research”, complaints of the sixteenth Symposium on built-in Circuits and methods Design (SBCCI ’03), © IEEE 2003.

    [6] Stephen Mellor, Balcer M., “Executable UML: A basis for model-driven structure”, Addison-Wesley, 2003.

    [7] Stephen Mellor, John Wolfe, Campbell McCausland, “Why methods-on-Chip wants extra UML like a hole within the Head”, Design, Automation, and check conference in Europe, DAC, 2005.


    [9] Ananda Shankar Basu, Marcello Lajolo, Mauro Prevostini. “a methodology for Bridging the gap between UML and Codesign”, UML for SoC Design publication by means of Kluwer/Springer, 2005.

    [10] Riccobene E., Scandurra P., Rosti A. and Bocchio S., “A UML 2.0 Profile for SystemC: towards Highlevel SoC Design”, 5th ACM foreign conference on Embedded application, 2005.

    [11] Rosenstiel W., Kuhn T., Schweizer T., Winterholer M., Schulz-Key C.. “Object-Oriented Modeling and Synthesis of SystemC necessities”, © IEEE 2004.

    [12] Riccobene E., Scandura P., Rosti A., Bocchio S., “A SoC Design Methodology Involving a UML 2.0 Profile for SystemC”, 5th ACM foreign convention on Embedded software, 2005.

    [13] Michael Butler, Colin Snook “UML-B: Formal modeling and design aided by way of UML”, ACM Transactions on application Engineering and Methodology, 2006.



    [16] Tan W. H., Thiagarajan P.S., Wong W. F., Zhu Y., Pilakkat S.okay., “Synthesizable SystemC Code from UML models”, RTSS'04, 2004.

    [17][18] Kathy Dang Nguyen, Zhenxin sun, P.S. Thiagarajan, Weng-Fai Wong, “model-pushed SoC Design by the use of Executable UML to SystemC”, RTSS'04, 2004.

    [19] Qiang Zhu, Akio Matsuda, Shinya Kuwamura, Tsuneo Nakata, Minoru Shoji. “An Object-Oriented Design manner for system-on-Chip the usage of UML”. within the 15th Int’l Symp. on gadget Synthesis. Copyright 2002 ACM.

    [20], overseas technology Roadmap for Semiconductors – Design file - 2005

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